Benchmarks

Deribit

This is one of the few crypto exchanges offering co-location (more details can be found here). Internal processing latency of Roq Trading Solutions may therefore become relevant.

We will therefore demonstrate some key latency metrics relevant to the performance of the gateway.

Note

All Roq gateways support live monitoring of performance metrics, including latency distributions. However, it is important to understand that a synthetic test will often not show the tail distributions that you will find for your actual product system. The distribution is often influenced by secondary effects, e.g. process scheduling, hyper-threading, SIMD, frequency scaling, interrupts, etc. Suffice to say, benchmark tools and access to profiling metrics are built-in features of all Roq Trading Solutions. We encourage you to run your own tests, on your own hardware, using your own kernel configuration.

We test two different configurations:

• Default

  • Gateway will try to reduce I/O polling and is allowed to yield CPU.

• Performance

  • Gateway will aggressively poll I/O and never yield CPU.

  • The system is generally configured for low latency using tuned-adm network-latency.

  • The kernel command-line will have e.g. isolcpus=1-6 to exclude some cores from general process scheduling.

  • Hyper-threading is disabled at the BIOS level.

Default

# flagfile for the roq-deribit gateway

--loop_cpu_affinity=1
--loop_sleep=500ns
--loop_timer_freq=2500ns

CPU	event	decode_1	decode_5	threads/core	isolcpus	PassMark
AMD EPYC 3251	5406	714	2274	1	1-6	1831
Intel Atom C3758	9735	1206	4066	1		857
Intel Core i7-6700	1825	341	1185	2		2303
Intel Xeon E3-1246 v3	2071	335	1132	2		2175

Performance

# flagfile for the roq-deribit gateway

--loop_cpu_affinity=1
--loop_sleep=0ns
--loop_timer_freq=100ns

CPU	event	decode_1	decode_5	threads/core	isolcpus	PassMark
AMD EPYC 3251	2372	707	2277	1	1-6	1831
Intel Atom C3758
Intel Core i7-6700
Intel Xeon E3-1246 v3

(*) All measurements in nanoseconds.

The table columns are

• [CPU] Name of the processor.

• [event] Gateway processing a Market Data Incremental Refresh FIX message. This includes

  1. decode the FIX message,

  2. apply the changes to a cached version of the full order book, and

  3. encode the update message for shared memory using our native format.

  The gateway subscribes all symbols from the exchange and runs for approximately 10-15 minutes.

• [decode_1] Decode a typical Market Data Incremental Refresh FIX message with 1 level updating.

• [decode_5] Decode a typical Market Data Incremental Refresh FIX message with 5 levels updating.

• [threads/core] Hyper-threading could be enabled (number > 1).

• [isolcpus] The Linux kernel will by default allow scheduling on all cores.

• [PassMark] The PassMark single-threaded score.